Verilog Digital System Design: Register Transfer Level Synthesis, Testbench, and Verification


Verilog Digital System Design: Register Transfer Level Synthesis, Testbench, and Verification
This rigorous text shows electronics designers and students how to deploy Verilog in sophisticated digital systems design.The Second Edition is completely updated -- along with the many worked examples -- for Verilog 2001, new synthesis standards and coverage of the new OVI verification library.

Details Verilog Digital System Design: Register Transfer Level Synthesis, Testbench, and Verification

Title Verilog Digital System Design: Register Transfer Level Synthesis, Testbench, and Verification
AuthorZainalabedin Navabi
Release Date3rd Oct 2005
PublisherMcGraw-Hill Professional
ISBN-100071445641
EAN9780071445641
FormatHardcover
LanguageEnglish
Pages384 pages
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